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STL (Software Test Library)
  • A Software Test Library (STL) is a suite of tests that checks processors functional logic to detect in-field permanent random hardware failures for CPUs, DSPs and NN cores
  • The STL provides either runtime diagnostic since its execution is transparent to the application or startup time diagnostic (startup diagnostic, which is run before the completion of the system setup can also include some destructive tests)
  • The test suite has a simple C interface allowing quick integration across multiple systems from bare metal implementation to scheduling through OS
  • The STL is a small, lightweight, efficient SW which allows fast diagnostic execution with minimum usage of HW resources.
  • The STL execution can be partitioned  to reduce the impact on the user application and meet timing requirements
  • The STL is developed in compliance with major quality standards, including ASPICE and safety standards in automotive, railway and industrial domains. The STL supports the achievement of functional safety in systems with the most stringent requirements targeting:
    • ASIL B, SIL 2 for random hardware failures
    • ASIL D, SIL 4 for systematic failures
  • The STL can support different compilers to allow maximum flexibility to meet customers’ needs

For any additional information or question about STL support for your processing nodes please send your enquiry to stl_info@resiltech.com.